Field of the Invention
This invention relates to a gate driver of a display apparatus, especially to a power on reset circuit applied to the gate driver of the display apparatus.
Description of the Related Art
Please refer to FIG. 1. FIG. 1 illustrates a schematic diagram of a conventional power on reset circuit. As shown in FIG. 1, the power on reset circuit 1 is applied to the gate driver of the display apparatus; the power on reset circuit 1 is coupled between an operating voltage VDD and a ground terminal GND and the power on reset circuit 1 is used to output a reset signal RESET. Wherein, a P-type transistor MP1 is coupled between the operating voltage VDD and a node A and a gate electrode of the P-type transistor MP1 is coupled to the ground terminal GND; a plurality of N-type transistors MN1˜MN4 are coupled in series between the node A and the ground terminal GND and gate electrodes of the plurality of N-type transistors MN1˜MN4 are all coupled to the operating voltage VDD; a plurality of inverters INV1˜INV4 are coupled in series between the node A and an output terminal OUT of the power on reset circuit 1; gate electrodes of the plurality of N-type transistors MN5˜MN8 are coupled between the node A and the inverter INV1, between the inverters INV1 and INV2, between the inverters INV2 and INV3 and between the inverters INV3 and INV4 respectively; source electrodes and drain electrodes of the plurality of N-type transistors MN5˜MN8 are all coupled to the ground terminal GND.
However, as shown in FIG. 2 and FIG. 3, when the power is turned off, if the operating voltage VDD is only decreased from 3.3 volts to 0.5 volts instead of being decreased to 0 volt, the reset signal RESET outputted by the power on reset circuit 1 may be decreased to 0 volt as shown in FIG. 2 or maintained at 0.5 volts as shown in FIG. 3. Once the reset signal RESET is maintained at 0.5 volts as shown in FIG. 3, when the power is turned on again, the operating voltage VDD will be increased from 0.5 volts to 3.3 volts and the reset signal RESET will be also increased from 0.5 volts to 3.3 volts with the operating voltage VDD.
Since the reset signal RESET is not decreased to 0 volt, when the power is turned on again, the reset function may be failed, and this may cause the incorrect initial state of the inner circuit of the gate driver and the abnormality of its operation and function. Especially, when the transistor having high threshold voltage VTN or |VTP| is used in the power on reset circuit 1, this reset failure may be easily occurred in certain combinations of manufacturing processes, temperatures and voltages, and the entire operation performance of the gate driver of the display apparatus will be seriously affected.
Therefore, the invention provides a power on reset circuit applied to the gate driver of the display apparatus to solve the above-mentioned problems.